Research Thrust 1: Semiconductor Growth and Integration

 

A central question in modern semiconductor technology is: how can we integrate high-performance crystalline materials onto technologically essential but fundamentally incompatible substrates like silicon, glass, or flexible foils? For decades, progress has been constrained by the principle of epitaxial growth, which requires a near-perfectly matched crystal lattice to serve as a template. This limitation has created a bottleneck for the monolithic integration of diverse materials needed for next-generation computing and sensing systems.

Our research addresses this challenge through the development of non-epitaxial growth techniques that circumvent the need for a lattice-matched substrate. Our initial work in Nature Communications first demonstrated that pristine, single-crystalline III-V semiconductors could be grown directly on amorphous substrates like silicon dioxide [1]. Subsequent research has focused on engineering this process for improved material quality, reliability, and systems compatibility. We have established that the optoelectronic quality of our Templated Liquid Phase (TLP) grown films is largely independent of the underlying buffer layers, indicating a high degree of process robustness [2]. We have also lowered the growth temperature to be compatible with back-end-of-line (BEOL) silicon CMOS processing (<400°C) [3] and have experimentally verified that the resulting films exhibit high charge-carrier mobilities comparable to conventionally grown materials [4].

This methodology was shown to be a general growth techniques, which allows for the fabrication of high-performance materials on a wide variety of substrates [5]. The flexibility of these techniques has enabled a diverse range of applications, from early demonstrations of low-cost solar cells on flexible foils [6] to more recent work integrating III-V semiconductors on CMOS-compatible metals for reconfigurable metasurfaces [7]. Taken together, these methods provide a pathway for the heterogeneous integration of compound semiconductors, enabling new device concepts that are not feasible with conventional epitaxial constraints.

 

Key Publications in Semiconductor Growth and Integration

 

1. Direct growth of single-crystalline III–V semiconductors on amorphous substrates

Chen, K., Kapadia, R., Harker, A., et al. Nature Communications 7, 10502 (2016). Link to Publication

• Key Scientific Result: Demonstration of a method for the direct, templated growth of single-crystalline III-V semiconductors (e.g., InAs) on amorphous substrates such as silicon dioxide (SiO_2).
• What Was Shown (Experiments): A novel templated growth technique was employed where the geometry of a nanoscale seed window defined the growth orientation. Cross-sectional Transmission Electron Microscopy (TEM) and electron diffraction were used to confirm the single-crystalline nature and high quality of the material grown on the amorphous surface.
• Relevance: This work provides a materials science solution for heterogeneous integration, enabling the potential for monolithic 3D structures that combine III-V optoelectronics with silicon-based circuits.

2. Buffer insensitive optoelectronic quality of InP-on-Si with templated liquid phase growth

Sarkar, D., Wang, W., Lin, Q., et al. & Kapadia, R. Journal of Vacuum Science & Technology B 36, 032902 (2018). Link to Publication

• Key Scientific Result: A study of the Templated Liquid Phase (TLP) growth of Indium Phosphide (InP), finding that the optoelectronic quality of the resulting film is largely independent of the underlying amorphous buffer layer’s properties.
• What Was Shown (Experiments): High-quality InP films were grown on several different amorphous dielectric buffer layers (e.g., SiO_2, SiN_x). Temperature-dependent and power-dependent photoluminescence (PL) spectroscopy was performed, revealing similar high quality (narrow linewidths, minimal non-radiative recombination) across the different buffers.
• Relevance: This result indicates a high degree of process robustness for the TLP method, relaxing the strict material constraints for buffer layers typically required in semiconductor growth and simplifying integration.

3. Low temperature growth of crystalline semiconductors on nonepitaxial substrates

Sarkar, D., Weng, S., Yang, D., et al. & Kapadia, R. Advanced Materials Interfaces 7, 1902191 (2020). Link to Publication

• Key Scientific Result: Demonstration of high-quality crystalline semiconductor (InP, InAs) growth on non-epitaxial substrates at temperatures below 400°C.
• What Was Shown (Experiments): The TLP process temperature was successfully lowered into a range compatible with back-end-of-line (BEOL) processing. Structural characterization via TEM confirmed the high crystalline quality of the films, and fabricated field-effect transistors exhibited good performance, indicating that the low-temperature process did not compromise electronic properties.
• Relevance: The reduction in thermal budget to below 400°C makes this growth technique compatible with BEOL CMOS processing, allowing for the integration of III-V materials without damaging pre-existing silicon circuitry.

4. High mobility large area single crystal III-V thin film templates directly grown on amorphous SiO2 on silicon

Tao, J., Sarkar, D., Weng, S., et al. & Kapadia, R. Applied Physics Letters 117, 042103 (2020). Link to Publication

• Key Scientific Result: Quantitative characterization of large-area, single-crystal III-V templates grown directly on amorphous SiO_2, confirming high charge carrier mobility.
• What Was Shown (Experiments): Large-area InAs templates were grown using the TLP method. Field-effect transistors were fabricated on these templates, and their electrical characteristics were measured. The devices exhibited electron mobilities comparable to those fabricated on conventionally grown, lattice-matched substrates, confirming the high electronic quality of the material.
• Relevance: The measured high mobility validates that the direct-growth method yields electronically sound films suitable for high-performance transistor applications.

5. Confined Liquid Phase Growth of Crystalline Compound Semiconductors on Any Substrate

Sarkar, D., Wang, W., Mecklenburg, M., et al. & Kapadia, R. ACS Nano 12, 5158–5166 (2018). Link to Publication

• Key Scientific Result: The development and generalization of the templated growth technique into a method termed “Confined Liquid Phase” (CLP) growth.
• What Was Shown (Experiments): The CLP technique was used to grow a variety of crystalline compound semiconductors on different non-native substrates, including various dielectrics and metals. Electron microscopy was used to confirm that the technique consistently produced high-quality crystalline material regardless of the underlying surface.
• Relevance: This method provides a generalized route for fabricating crystalline compound semiconductors on a wide variety of substrates, significantly expanding the possibilities for heterogeneous materials integration.

6. A direct thin-film path towards low-cost large-area III-V photovoltaics

Kapadia, R., Yu, Z., Wang, H. H., et al. Scientific Reports 3, 2275 (2013). Link to Publication

• Key Scientific Result: The initial demonstration of the thin-film vapor-liquid-solid (TF-VLS) growth mode to produce large-area, polycrystalline InP films on inexpensive metal foils.
• What Was Shown (Experiments): Polycrystalline InP films with large grain sizes (>100 µm) were grown on molybdenum foils. The optoelectronic quality was confirmed via photoluminescence, and the material was fabricated into functioning solar cell devices, which were characterized under illumination.
• Relevance: This early co-first author work demonstrated the potential of non-epitaxial growth for large-area applications like photovoltaics and served as a precursor to the development of single-crystalline growth techniques.

7. Monolithic III–V on Metal for Thermal Metasurfaces

Chae, H. U., Shrewsbury, B., Ahsan, R., et al. & Kapadia, R. ACS Nano 16, 18497–18502 (2022). Link to Publication

• Key Scientific Result: Successful monolithic integration of III-V semiconductor nanostructures directly onto CMOS-compatible metallic substrates.
• What Was Shown (Experiments): High-quality InP was grown using the CLP method on titanium nitride (TiN), a metal commonly used in silicon manufacturing. The resulting InP/TiN heterostructure was patterned and shown to function as an electrically tunable thermal metasurface, with its infrared emissivity modulated by an applied voltage.
• Relevance: This work expands the substrate compatibility of our growth techniques to include metals, enabling the fabrication of novel, monolithically integrated devices such as the demonstrated active optical and thermal components.

 

 

Research Thrust 2: Hot Electron Devices and Physics

 

In a semiconductor, photo-excited electrons can possess significant excess energy, but they typically dissipate it as waste heat within picoseconds. This raises a fundamental question: can this immense, non-equilibrium energy of “hot” electrons be efficiently captured and harnessed for useful work before it is lost? Our group designs and fabricates devices that operate on these ultrafast timescales to explore and exploit the unique physics of these energetic charge carriers.

Our research in this area proceeds along two parallel paths. The first explores the use of hot electrons to drive chemical reactions at solid-liquid interfaces. We initially demonstrated that hot electrons generated by sub-bandgap illumination of a silicon device could drive the hydrogen evolution reaction (HER) with near-unity internal quantum efficiency [1]. We then advanced this concept, showing that on a graphene-based electrode, the HER onset potential could be actively tuned with light, establishing a new paradigm for optically controlled, metal-free catalysis [2].

The second path focuses on the physics of electron emission into vacuum. Our work in Nature Photonics demonstrated the first on-chip, waveguide-integrated graphene hot electron emitter, creating a new class of optically-addressable, high-speed electron source [3]. To complement this experimental breakthrough, we developed a comprehensive theoretical framework to understand the fundamental performance limits of such devices, providing a predictive guide for future designs [4]. We further showcased the versatility of the waveguide-integrated platform by successfully incorporating other advanced materials, such as lanthanum hexaboride (LaB_6) nanoparticles [5]. Finally, to address the practical limitations of conventional photocathodes, we developed an air-stable, silicon-based device where the effective work function can be tuned electrostatically to achieve a state of negative electron affinity, enabling robust and tunable electron emitters without the need for delicate surface coatings [6].

 

Key Publications in Hot Electron Devices and Physics

 

1. High quantum efficiency hot electron electrochemistry

Chae, H. U., Ahsan, R., Lin, Q., et al. & Kapadia, R. Nano Letters 19, 6227–6234 (2019). Link to Publication

• Key Scientific Result: This work demonstrated near-unity internal quantum efficiency for a hot electron-driven hydrogen evolution reaction (HER) on a silicon-based device using sub-bandgap illumination.
• What Was Shown (Experiments): A Schottky barrier device consisting of a thin titanium nitride (TiN) film on a p-type silicon wafer was fabricated and operated as a photocathode in an acidic electrolyte. The device was illuminated with photons whose energy was below the silicon bandgap. The resulting photocurrent from hot electron injection and the volume of hydrogen gas produced (measured via gas chromatography) were used to calculate the internal quantum efficiency.
• Relevance: This research provides a pathway for utilizing low-energy photons for photocatalysis, a task that typically requires high-energy photons or external electrical bias, opening new possibilities for efficient solar fuel production.

2. Tunable Onset of Hydrogen Evolution in Graphene with Hot Electrons

Chae, H. U., Ahsan, R., Tao, J., Cronin, S. B., & Kapadia, R. Nano Letters 20, 1791–1799 (2020). Link to Publication

• Key Scientific Result: Demonstration of a hot-electron-driven hydrogen evolution reaction (HER) on a graphene/silicon device where the onset potential for the reaction is tunable via optical illumination.
• What Was Shown (Experiments): A device consisting of graphene on n-type silicon was used as an electrode. Cyclic voltammetry was performed in an electrolyte under varying levels of illumination. The experiments showed that the illumination intensity could shift the HER onset potential by hundreds of millivolts, effectively using light to control the electrochemical process in real-time.
• Relevance: This work established that hot electron injection is not just a mechanism for enhancing reaction rates but can also serve as an active control parameter, enabling optically tunable catalysis on a metal-free electrode.

3. Hot-electron emission processes in waveguide-integrated graphene

Rezaeifar, F., Ahsan, R., Lin, Q., Chae, H. U., & Kapadia, R. Nature Photonics 13, 843–848 (2019). Link to Publication

• Key Scientific Result: The first demonstration of an on-chip, waveguide-integrated hot electron emitter based on graphene, where guided light directly generates an electron emission current into vacuum.
• What Was Shown (Experiments): A silicon photonic waveguide was fabricated and a layer of graphene was transferred to be evanescently coupled to the guided optical mode. The device was placed under vacuum and high voltage bias. Light guided through the waveguide excited hot electrons in the graphene, which were then thermionically emitted. The emitted electron current was measured as a function of optical input power, device temperature, and electrical bias, confirming the photo-thermionic emission mechanism.
• Relevance: This work successfully integrates the fields of silicon photonics and vacuum electronics, creating a new class of compact, high-speed, and optically-addressable electron sources with potential applications in scientific instrumentation, communications, and displays.

4. Performance limits of graphene hot electron emission photoemitters

Ahsan, R., Sakib, M. A., Chae, H. U., & Kapadia, R. Physical Review Applied 13, 024060 (2020). Link to Publication

• Key Scientific Result: A theoretical and computational analysis establishing the fundamental performance limits and operating principles of graphene-based hot electron photoemitters.
• What Was Shown (Analysis): A comprehensive model was developed combining electron-photon, electron-electron, and electron-phonon scattering dynamics with thermionic emission theory. The model was used to calculate the intrinsic quantum efficiency and energy distribution of emitted electrons, revealing key trade-offs between speed, efficiency, and material properties.
• Relevance: This theoretical work provides a crucial predictive framework for understanding and optimizing graphene-based hot electron devices, guiding the design of future high-performance emitters. It complements the experimental work by elucidating the underlying physics.

5. Hot electron emission from waveguide integrated lanthanum hexaboride nanoparticles

Rezaeifar, F., Chae, H. U., Ahsan, R., & Kapadia, R. Applied Physics Letters 118, 073503 (2021). Link to Publication

• Key Scientific Result: Demonstration of a waveguide-integrated hot electron emitter using lanthanum hexaboride (LaB_6) nanoparticles as the emissive material.
• What Was Shown (Experiments): LaB_6 nanoparticles, known for their low work function and high thermal stability, were deposited onto a silicon photonic waveguide. Light guided through the waveguide heated the nanoparticles, inducing thermionic emission of electrons into vacuum. The emission current was characterized as a function of optical power, confirming the optically driven emission mechanism in this new material system.
• Relevance: This research demonstrates the versatility of the waveguide-integrated emitter platform. By successfully incorporating a new material system (LaB_6) beyond graphene, it shows that the core concept can be adapted to leverage the unique properties of various advanced emissive materials.

6. Electrostatically Generated Air-Stable Negative Electron Affinity Silicon Photocathode

Priyoti, A. T., Ahsan, R., Chae, H. U., et al. & Kapadia, R. ACS Photonics 10, 4501–4508 (2023). Link to Publication

• Key Scientific Result: An air-stable, silicon-based photocathode was developed where a state of negative electron affinity (NEA) is generated and tuned purely via an external electric field.
• What Was Shown (Experiments): A metal-oxide-semiconductor (MOS) capacitor structure was fabricated on silicon using a transparent gate electrode. A positive voltage applied to the gate was shown to induce strong downward band bending at the silicon-dielectric interface, effectively lowering the vacuum level to below the silicon conduction band minimum (achieving NEA). The device’s photo-emissive quantum efficiency was measured as a function of gate voltage and incident light wavelength, demonstrating robust tunability and stable operation after prolonged air exposure.
• Relevance: This approach provides a solution to the long-standing stability and materials challenges of traditional cesium-based NEA photocathodes, enabling a new class of robust, practical, and electronically tunable high-performance electron emitters.

 

Research Thrust 3: Neuromorphic and Analog Computing

 

A central challenge in the advancement of artificial intelligence is the immense energy consumption of conventional computing hardware. This motivates a guiding question for our research: can we develop new hardware paradigms, inspired by the principles of neural computation, to fundamentally overcome these energy limitations?

Our initial approach to this question was to develop hardware that emulates synaptic functionality using our unique materials growth platform. We fabricated InP-based artificial synapses on silicon that could mimic fundamental biological learning rules like long-term potentiation and depression [1]. We then advanced this work by engineering the device structure to emulate more complex behaviors, such as the consolidation of short-term to long-term memory [2]. More recently, our research has expanded to explore a novel computing paradigm, inspired by the discovery of chaotic oscillations in our nanoscale devices. We recognized that while chaotic systems are unpredictable in time, their frequency spectra can be stable and information-rich. Our work in ACS Nano demonstrates the principle of performing reliable computation by reading out this stable frequency signature from our “Oscillatory Neurons” (ORNs). Using this method, we demonstrated an in-sensor computing system for machine vision operating at ~5 attojoules per operation [3]. This experimental work is grounded in a strong theoretical foundation, as we have also designed and demonstrated a physical electronic analog of the canonical FitzHugh-Nagumo neuron model [4]. This research direction establishes a new pathway for artificial intelligence, moving beyond digital logic to a new paradigm of frequency-based, chaos-driven analog computing.

 

Key Publications in Neuromorphic and Analog Computing

 

1. Mimicking biological synaptic functionality with an indium phosphide synaptic device on silicon for scalable neuromorphic computing

Sarkar, D., Tao, J., Wang, W., et al. & Kapadia, R. ACS Nano 12, 1656–1663 (2018). Link to Publication

• Key Scientific Result: This work demonstrated an artificial synaptic device, fabricated using InP grown directly on a silicon platform, that successfully emulated the fundamental plasticity rules of biological synapses.
• What Was Shown (Experiments): An InP-based floating-gate phototransistor was designed and fabricated. The device’s response to electrical pulse trains applied to the gate was systematically characterized. These measurements demonstrated key synaptic behaviors, including paired-pulse facilitation (PPF), short-term potentiation (STP), and the history-dependent transition to long-term potentiation/depression (LTP/LTD). The device’s photoresponse was also measured, confirming its functionality as an opto-neural synapse.
• Relevance: This work established the viability of our unique materials platform for creating hardware that mimics the basic components of neural computation, serving as the foundational entry point for our group into the field of neuromorphic engineering.

2. Engineering complex synaptic behaviors in a single device: Emulating consolidation of short-term memory to long-term memory in artificial synapses via Dielectric Band Engineering

Tao, J., Sarkar, D., Kale, S., Singh, P. K., & Kapadia, R. Nano Letters 20, 7793–7801 (2020). Link to Publication

• Key Scientific Result: This research demonstrated the engineering of higher-order, complex synaptic memory behaviors, specifically the emulation of memory consolidation (the transition from short-term to long-term memory), within a single physical device.
• What Was Shown (Experiments): A multi-layered gate dielectric stack (e.g., Al_2O_3/HfO_2) with distinct charge-trapping time constants was incorporated into the InP floating-gate transistor structure. By applying specific electrical stimulation protocols (“training”), the device’s current was measured over time, revealing a multi-timescale memory retention characteristic. This physical behavior was shown to quantitatively mirror established psychological models of memory consolidation.
• Relevance: This research demonstrated a significant advance in the complexity and biological realism of our artificial synapses. It showed that through rational device engineering, our hardware could replicate not just simple learning rules but also sophisticated cognitive functions, pointing towards a pathway for more powerful neuromorphic systems.

3. Ultralow power in-sensor neuronal computing with oscillatory retinal neurons for frequency-multiplexed, parallel machine vision

Ahsan, R., Chae, H. U., Jalal, S. A. A., et al. & Kapadia, R. ACS Nano 18, 23785–23796 (2024). Link to Publication

• Key Scientific Result: A novel in-sensor computing paradigm was demonstrated using the stable frequency spectra of chaotic oscillators for ultralow-power, parallel machine vision.
• What Was Shown (Experiments): An array of Indium Selenide (InSe) field-effect transistors was shown to produce chaotic, neuron-like oscillations under specific bias and illumination. The stable, information-rich Fast Fourier Transform (FFT) of these oscillations was used as a feature vector. This “frequency-domain reservoir computing” approach was used to classify the MNIST handwritten digit dataset with high accuracy directly from optical input, achieving an energy consumption of ~5 aJ/operation.
• Relevance: This paper marks a significant paradigm shift, introducing a novel computing modality that leverages the stable dynamics of chaos in the frequency domain. It established a complete ‘sensor-to-answer’ pathway for machine vision with extreme energy efficiency, moving beyond mimicking individual components to demonstrating a full, scalable computational system.

4. Ultralow power electronic analog of a biological Fitzhugh–Nagumo Neuron

Ahsan, R., Wu, Z., Jalal, S. A. A., & Kapadia, R. ACS Omega 9, 18062–18071 (2024). Link to Publication

• Key Scientific Result: The design, fabrication, and characterization of an ultralow-power electronic circuit that is a direct physical analog of the biological FitzHugh-Nagumo neuron model.
• What Was Shown (Experiments): A simple circuit comprising two transistors and a resistor-capacitor network was designed and simulated. The circuit’s voltage dynamics were measured experimentally, and the resulting phase-space portraits and time-series outputs were shown to quantitatively replicate the key behaviors of the FitzHugh-Nagumo model, including spiking, excitability, and refractory periods, while operating at pico- to femtojoule energy levels per spike.

•Relevance: This work provides a strong theoretical and neuroscientific grounding for our experimental oscillatory neuron research. By demonstrating a direct, quantitative link between our hardware approach and a canonical model of neural computation, it validates that the observed complex dynamics are a robust implementation of established brain-inspired principles•